In U.S. Pat. No. 6,482,681 B1 a punch-through (PT) insulated gate bipolar transistor (IGBT) is described. Such a PT-IGBT is also schematically shown in FIG. 1. The FIG. 1 device can be produced by using an n doped wafer, on top of which processes for manufacturing layers on the emitter side 31, also called cathode side, are finished (i.e., all junctions and metallizations on the emitter side 31 are produced). Afterwards, the wafer is thinned and hydrogen ions are implanted on the collector side 21 of the wafer, also called anode side for forming an n+ doped buffer layer 15. Then p type particles are implanted for forming a collector layer 6. The wafer is then annealed at 300 to 400° C. in order to activate the hydrogen ions without damage to the structure on the emitter side 31. The buffer layer 15 can also be formed by multiple hydrogen implants of progressively shallower and progressively higher total dose in order to form one buffer layer 15 with increasing doping concentration towards the collector and a peak dose concentration close to the collector.
Due to the continuously rising doping concentration in the buffer layer 15 the reduction of the electric field during operation of the device increases within the layer. Thus, the buffer layer 15 serves, in the blocking case, for abruptly decelerating the electric field (shown in FIG. 1 by the dotted line) before the collector, thus keeping it away from the collector. The semiconductor element can be destroyed if the electric field reaches the collector.
DE 198 29 614 discloses a fabrication method for a soft punch-through power semiconductor element based on a PT type. Relatively thin semiconductor elements can be fabricated without having to employ an epitaxy method. For this purpose, a buffer layer having a greater thickness than electrically necessary is introduced into a lightly doped wafer. Process steps for embodying a cathode patterned surface of the semiconductor element are then carried out. Afterward, the thickness of the buffer layer is reduced to the electrically desired size by grinding or polishing. Thus, the cathode process steps can be performed on a relatively thick wafer, thereby reducing the risk of breaking. Nevertheless, by virtue of the subsequent thinning of the wafer, a semiconductor element having a desired small thickness can be produced. The minimum thickness of the finished semiconductor elements is not limited by a minimum thickness that can be achieved for its starting material. In addition, doping of the residual stop layer can be relatively low, so that the emitter efficiency can be set by way of the doping of the collector.
JP 2004 193212 relates to a PT-IGBT with two buffer layers which are separated by a layer which has the same doping density as the base layer. The deeper buffer layer has a lower peak doping concentration than the shallow buffer layer. Such a device has a high leakage current and a low breakthrough voltage.
All of the documents mentioned herein are incorporated by reference in their entireties.